Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-02-08
2005-02-08
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C002S011000, C713S401000
Reexamination Certificate
active
06854103
ABSTRACT:
An apparatus and method for automatically generating a visual representation of a resistance network and an equivalent point to point resistance for any set of terminals on the resistance network are provided. With the apparatus and method, a cell layout is input to a resistance/capacitance (RC) extraction tool. The RC extraction tool extracts the RC parasitics from the cell layout and inputs them into a resistance network visualization and analysis tool. From the RC parasitics, a graph data structure representation of the resistance network is generated. The graph data structure of the resistance network may then be reduced using, for example, a single layer series and parallel reduction, all layers series and parallel reduction, layer specific reduction, or the like. Following reduction, if any, a visual representation of the resistance network is generated using the graph data structure. Thereafter, equivalent point to point resistance for any set of terminals on the resistance network may be generated. The point to point resistance may be used for detailed analysis and verification of the extracted parasitics. The equivalent resistance is calculated using mesh and matrix analysis based on the graph data structure representation of the resistance network.
REFERENCES:
patent: 6751744 (2004-06-01), Allen et al.
patent: 20010029601 (2001-10-01), Kimura et al.
Do Thuan
LSI Logic Corporation
Yee & Associates P.C.
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