Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-11-28
2006-11-28
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C711S001000
Reexamination Certificate
active
07143225
ABSTRACT:
A processing system comprising: i) a processor core; ii) a memory; iii) a plurality of peripheral devices; and iv) a communication bus coupled to the processor core, the memory and the peripheral devices for transferring bus transactions between the processor core, the memory, and the peripheral devices. The communication bus comprises a bus controller for receiving memory access request data associated with a first memory access to a first location in the memory by a first one of the peripheral devices and transferring the received memory access request data to at least one memory address pin used to access the memory.
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Tischler Brett A.
Valencia Redentor D.
Advanced Micro Devices , Inc.
Cerullo Jeremy S.
Perveen Rehana
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