Apparatus and method for verification support, and computer...

Details Apparatus and method for verification support, and computer... Apparatus and method for verification support, and computer...

2005-10-20

2008-07-15

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C327S039000, C327S047000, C714S731000, C714S744000

Reexamination Certificate

active

07401306

ABSTRACT:
A verification support apparatus verifies an object. The object includes a plurality of clock domains and each clock domain includes a plurality of registers. The verification support apparatus includes an input receiving unit that receives logical circuit description information on the object; a specifying unit that specifies at least two registers in one clock domain that output data to an adjacent clock domain; and a detecting unit that detects, based on the logical circuit description information and specified registers, a re-convergence register in the adjacent clock domain that achieves convergence.

REFERENCES:
patent: 5700753 (1997-12-01), Wang et al.
patent: 5793227 (1998-08-01), Goldrian
patent: 6510535 (2003-01-01), Hosokawa et al.
patent: 2005/0268265 (2005-12-01), Ly et al.
patent: 2005/0273735 (2005-12-01), Dargelas
patent: 6-83901 (1994-03-01), None
patent: 10-117185 (1998-05-01), None

Affiliated with

Also associated with

Rating

Apparatus and method for verification support, and computer... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for verification support, and computer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for verification support, and computer... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3965057