Apparatus and method for using branch prediction heuristics...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C712S239000

Reexamination Certificate

active

07996618

ABSTRACT:
A single unified level one instruction(s) cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instruction(s) consistent with conventional cache lines. Formation of trace lines in the cache is delayed on initial operation of the system to assure quality of the trace lines stored.

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U.S. Appl. No. 11/538,831, filed Oct. 5, 2006, entitled,“Apparatus and Method for Using Branch Prediction Heuristics for Determination of Trace Formation Readiness,”.

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