Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-08-09
2011-08-09
Treat, William M (Department: 2181)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C712S239000
Reexamination Certificate
active
07996618
ABSTRACT:
A single unified level one instruction(s) cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instruction(s) consistent with conventional cache lines. Formation of trace lines in the cache is delayed on initial operation of the system to assure quality of the trace lines stored.
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