Apparatus and method for transporting interrupts from secondary

Details Apparatus and method for transporting interrupts from secondary Apparatus and method for transporting interrupts from secondary

1998-09-30

2000-10-03

Etienne, Ario

Electrical computers and digital data processing systems: input/

Interrupt processing

710261, 710266, 710268, 710128, 710129, 710 48, G06F 1324

Patent

active

061286915

ABSTRACT:
During the boot of a computer system, IRQs from peripheral components located on secondary PCI busses must be transported to the interrupt controller on the compatibility PCI bus for communication to central processing units (CPUs). According to the invention, these IRQs are detected by a Secondary Interrupt Mapping (SIM) device which transports the signals according to a 2 bit bus protocol over a wired-"OR" bus structure to a Primary Interrupt Mapping (PIM) device located on the compatibility PCI bus. The PIM and SIM transport IRQs over the bus structure utilizing a timing sequence and 2-bit bus protocol. The PIM serves as the master device of the timing sequence and at appropriately designated sequence slots receives bus command signals from the SIM which map to particular interrupt signals that the PIM forwards to the interrupt controller on the compatibility PCI bus for transportation to the CPUs.

REFERENCES:
patent: 5535420 (1996-07-01), Kardach et al.

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