Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1998-07-23
2000-04-11
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711135, 711163, 711210, G06F 1210
Patent
active
060498579
ABSTRACT:
An apparatus and method for translating a virtual address to a physical address utilizing an address translation unit implemented within a network interface card is described. The address translation unit of the present invention is utilized in a computer system. The computer system comprises a first bus; processors with embedded caches and memory coupled to the first bus; a second bus; a network logic coupled to the second bus, wherein the network logic includes an address translation unit; and a bus bridge coupled to the first bus and to the second bus.
REFERENCES:
patent: 4488256 (1984-12-01), Zolnowsky et al.
patent: 5155825 (1992-10-01), Moughanni et al.
patent: 5283876 (1994-02-01), Tague
patent: 5613071 (1997-03-01), Rankin et al.
patent: 5666514 (1997-09-01), Cheriton
patent: 5751951 (1998-05-01), Osborne et al.
patent: 5784708 (1998-07-01), Bridges et al.
patent: 5815664 (1998-09-01), Asano
patent: 5818842 (1998-10-01), Burwell et al.
patent: 5845325 (1998-12-01), Loo et al.
patent: 5845331 (1998-12-01), Carter et al.
Chan Eddie P.
Nguyen Than
Sun Microsystems Inc.
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