Apparatus and method for tracking changes in address size and fo

Details Apparatus and method for tracking changes in address size and fo Apparatus and method for tracking changes in address size and fo

1997-06-09

2000-01-18

An, Meng-Ai T.

Electrical computers and digital processing systems: processing

Processing control

Branching

712226, 712202, 712245, G06F 938

Patent

active

060165448

ABSTRACT:
An apparatus and method for improving the execution speed of stack segment load operations is provided. Rather than delaying translation of instructions following stack segment loads, until the load is complete, the present invention presumes that no change will be made to the stack address size. Tracking of the stack address size, at the time of translation, is performed by a plurality of SAS bits associated with translated micro instructions, and logic is provided which compares the tracked SAS bits with any change in the stack address size. If no change is made by the stack load operation, the already translated instructions execute immediately. If a change is made by the stack load operation, logic interrupts processing of the translated instructions, and the instructions are retranslated using the new stack address size.

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