Apparatus and method for testing semiconductor memory...

Details Apparatus and method for testing semiconductor memory... Apparatus and method for testing semiconductor memory...

2007-05-22

2007-05-22

Britt, Cynthia (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C365S201000

Reexamination Certificate

active

10886074

ABSTRACT:
There are provided an apparatus and method for testing semiconductor memory devices, in which the frequencies of test pattern signals can be selectively changed. The test apparatus includes a main tester, an input frequency converter, and an output frequency converter. The main tester generates first input test signals with a first frequency, a first program control signal, and a second program control signal, receives first output test pattern signals with the first frequency, and determines an operating performance of a semiconductor memory device. The input frequency converter converts the first input test pattern signals into second input test pattern signals with a second frequency in response to the first program control signal, and applies the second input test pattern signals to the semiconductor memory device. The output frequency converter converts the second output test pattern signals with the second frequency received from the semiconductor memory device into the first output test pattern signals in response to the second program control signal and outputs the first output test pattern signals. The test apparatus and method can test semiconductor memory devices with a high operating frequency by selectively changing the frequencies of test pattern signals.

REFERENCES:
patent: 6901546 (2005-05-01), Chu et al.
patent: 6917215 (2005-07-01), Ichikawa
patent: 10062504 (1996-08-01), None
patent: 02000091390 (2000-03-01), None
patent: 01/95339 (2001-12-01), None

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