Apparatus and method for testing redundant memory elements

Details Apparatus and method for testing redundant memory elements Apparatus and method for testing redundant memory elements

2005-07-19

2005-07-19

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000, C365S189120

Reexamination Certificate

active

06920072

ABSTRACT:
A semiconductor device includes a primary memory array, primary addressing circuitry, a redundant memory array, redundant addressing circuitry, and a first signal pad. The primary memory array includes primary memory elements operable to store data, and the primary addressing circuit is operable to select the primary memory elements. The redundant memory array includes redundant memory elements operable to store data and is also operable to be programmed from a programmable state to provide redundant memory elements for defective primary memory elements. The first signal pad is operable to receive serial selection data, and the redundant addressing circuit is connected to the first signal pad and is operable to receive the serial selection data from the first signal pad and select the redundant memory elements in response.

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