Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
Reexamination Certificate
1998-03-23
2001-06-26
Grant, William (Department: 2121)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Correction for skew, phase, or rate
Reexamination Certificate
active
06253333
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to VLSI modules and testing thereof, and particularly, to an apparatus and testing methodology for automatically adjusting timing delays of time critical signals present in VLSI modules and printed circuit board units.
2. Discussion of the Prior Art
In the development of VLSI products, careful consideration is paid to external interfaces. These interfaces are typically glueless and are required to support an array of different modules with different timing requirements. The problem lies in the generation of one set of timing delays for external interfaces that handles all timing conditions. The timing delays are for timing critical signals, such as synchronous clocks. One can optimize for nominal timings, worst case, or best case, but, as is often the case, silicon processes inherently drift between nominal and the two extremes. Because of this inherent drift the timing design needs to handle multiple timing cases.
Currently, once the nominal, best and worst case delays are identified, a user typically decides and manually programs the selected delay to use for optimum circuit operation.
It would be highly desirable to provide an automatic process that tests the delays between the VLSI module, printed circuit board (PCB), and external memory module as a unit and, further that automatically adjusts the delay of time critical signals input to time sensitive circuits without operator intervention.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a technique for automatically testing devices having time critical inputs.
It is a further object of the present invention to provide an automatic testing technique for devices having time critical inputs, which technique provides for the automatic generation of delays for the time critical inputs to ensure that the device has been optimized for the particular application, operating environment, etc.
A further object is to provide a testing technique that automatically selects delays of timing signals to time critical inputs of an external device, e.g., memory module, based on verification of the printed-circuit board connections, wiring lengths, environmental variables, and silicon process drift.
In accordance with the principles of the invention, there is provided a method and apparatus for automatically generating a delay for a timing clock signal input to a time critical circuit of an electronic device, the time critical circuit capable of receiving address, data, and control signals at a first time interval and performing data storage and data output operations at a second time interval determined by the timing clock signal input thereto, and including: a first control circuit device for determining a timing condition of the time critical circuit in accordance with data output results corresponding to a first data storage operation in the time critical circuit; and, a second control circuit for automatically adjusting the input of the timing clock signal in time with respect to the first time interval in accordance with the results; wherein the adjusted timing clock signal is thereafter input to the time critical circuit for subsequent data storage operations to optimum time critical circuit performance.
REFERENCES:
patent: 5063576 (1991-11-01), Eguchil
patent: 5426772 (1995-06-01), Brady
patent: 5917760 (1999-06-01), Millar
patent: 5946712 (1999-08-01), Lu et al.
patent: 5953284 (1999-09-01), Baker
patent: 5978929 (1999-11-01), Covino et al.
Bogumil Stanley J.
Boice Charles E.
Webster Frederic G.
Woodard Robert L.
Grant William
Hartman Jr. Ronald D
International Business Machines - Corporation
Pivnichny John R.
Scully Scott Murphy & Presser
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