Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
Reexamination Certificate
2007-06-12
2007-06-12
Tu, Christine T. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Transmission facility testing
C714S043000
Reexamination Certificate
active
10985461
ABSTRACT:
This invention discloses a method for testing at least one physical link on a motherboard associated with an on-board PCI Express device. A test card is connected to an input/output port on the motherboard, wherein the test card has a PCI Express test device. A test pattern is transmitted from the test card to the PCI Express device and receiving a test result pattern by the test card from the PCI Express device through the physical link for testing thereof. The test result pattern is examined to determine defects of the physical link on the motherboard.
REFERENCES:
patent: 5029166 (1991-07-01), Jarwala et al.
patent: 6311296 (2001-10-01), Congdon
patent: 6421798 (2002-07-01), Lin et al.
patent: 6915343 (2005-07-01), Brewer et al.
patent: 7107494 (2006-09-01), Tischler
Lai Jiin
Tseng Wayne
Kirkpatrick & Lockhart Preston Gates Ellis
Tu Christine T.
Via Technologies Inc.
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