Static information storage and retrieval – Read/write circuit – Testing
Patent
1997-04-29
1999-07-13
Hoang, Huan
Static information storage and retrieval
Read/write circuit
Testing
36523003, 36523006, 365236, G11C 700
Patent
active
059235993
ABSTRACT:
In a built-in-self-test (BIST) unit or a memory unit, an address limits unit is provided which, prior to initiation of the test procedures, has start and stop addresses stored therein. Upon the initiation of the test procedures by the BIST unit, the start address of the address limits unit is transferred to the address counters units wherein the start address serves as the initial test address. The stop address is transferred to the address counters unit wherein the stop address will be compared with the current address. When the stop address and the current address match, the test procedure being executed by the BIST unit will be terminated. In this manner, any subarray in the memory unit can be selected for test.
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Cline Danny R.
Hii Kuong H.
Loh Wah K.
Powell Theo J.
Donaldson Richard L.
Hoang Huan
Hoel Carlton H.
Holland Robby T.
Texas Instruments Incorporated
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