Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2005-07-28
2008-11-18
Connolly, Mark (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C702S072000
Reexamination Certificate
active
07454647
ABSTRACT:
A skew measurement system and method wherein each of the signals among which the skew is to be determined is connected one at a time to a clock recovery loop. The locked state of the clock recovery loop is used as an indicator of the skew of the data signal relative to the internal clock of the clock recovery loop. By measuring the difference between the locked state of different signals, their relative skew can be measured.
REFERENCES:
patent: 6737852 (2004-05-01), Soma et al.
patent: 6812727 (2004-11-01), Kobayashi
patent: 7275173 (2007-09-01), Lindt
patent: 2002/0196067 (2002-12-01), Schultz
Ceekala Vijaya
Devnath Varadarajan
Whitcomb Lawrence K.
Wieser James B.
Connolly Mark
National Semiconductor Corporation
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