Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2007-02-13
2007-02-13
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S051000, C365S230060
Reexamination Certificate
active
10666454
ABSTRACT:
The disclosed embodiments of the present invention include a semiconductor memory apparatus having a selectable memory capacity. In one embodiment, a system includes input, output, and data storage devices, a processor coupled to the devices, a memory device coupled to the processor, and a configuration circuit interposed between the processor and the memory device to selectively couple lines in the address, control and data busses of the processor to lines in the address, control and data busses of the memory device. In another embodiment, a memory device includes an array coupleable to one or more busses of an external device and a configuration circuit between the array and the busses of the external device to selectively couple the busses to the memory cell array. In a particular embodiment, the configuration circuit includes one or more bi-stable relays, such as Micro-Electrical-Mechanical System (MEMS) relays.
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Gomm, Troy et al., “In-Plane Linear Displacement Bistable Microrelay,” Journal of Micromechanics and Microengineering, vol. 12, 2002, pp. 1-8.
Kim, Joonwon et al., “Mercury Contact Micromechanical Relays,” Mechanical and Aerospace Engineering Department, University of California, Los Angeles.
Dinh Son T.
Dorsey & Whitney LLP
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