Apparatus and method for repairing semiconductor memory device

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S200000, C365S210130, C365S230030

Reexamination Certificate

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11270184

ABSTRACT:
Apparatus and methods are provided for repairing semiconductor memory devices having an open bit line sense amplifier architecture with cell array blocks having memory blocks formed of edge sub-blocks, main sub-blocks, dummy sub-blocks. Row defects can be processed using a straight edge block when DQ data are outputted by enabling three word lines such that a repair process for the memory device in an edge sub-block or a dummy sub-block has the same repair efficiency as that of a case where defects occur in a main sub-block.

REFERENCES:
patent: 5608668 (1997-03-01), Zagar et al.
patent: 6920057 (2005-07-01), Honda et al.
patent: 6934214 (2005-08-01), Fujisawa et al.
patent: 2000-090697 (2000-03-01), None
patent: 1996-0015903 (1996-05-01), None
Patent Abstract of Japan for application No. 2000-090697.
Korean Patent Abstract for application No. 1996-0015903.

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