Electrical computers and digital processing systems: processing – Processing control – Processing sequence control
Reexamination Certificate
2007-05-01
2007-05-01
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Processing sequence control
C712S226000
Reexamination Certificate
active
10631628
ABSTRACT:
A method and apparatus for redundant zero micro-operation removal. In one embodiment, the method includes the identification of a predetermined macro-instruction. Once identified, a value associated with a source register operand of the identified macro-instruction is determined. Once determined, the identified macro-instruction is decoded into a first macro operation and a second micro-operation if the determined value is not set. Otherwise, the identified macro-instruction is decoded into a single micro-operation if the determined value is set. Accordingly, the method described prevents the generation of redundant micro-operations that use valuable resources, such as allocation slots, as well as execution units within the processor core.
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Sperber Zeev
Valentine Robert
Blakely , Sokoloff, Taylor & Zafman LLP
Coleman Eric
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