Apparatus and method for redundant software thread computation

Electrical computers and digital processing systems: virtual mac – Task management or control

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C710S052000, C710S056000

Reexamination Certificate

active

07818744

ABSTRACT:
An apparatus and method for redundant transient fault detection. In one embodiment, the method includes the replication of an application into two communicating threads, a leading thread and a trailing thread. The trailing thread may repeat computations performed by the leading thread to detect transient faults, referred to herein as “soft errors.” A first in, first out (FIFO) buffer of shared memory is reserved for passing data between the leading thread and the trailing thread. The FIFO buffer may include a buffer head variable to write data to the FIFO buffer and a buffer tail variable to read data from the FIFO buffer. In one embodiment, data passing between the leading thread data buffering is restricted according to a data unit size and thread synchronization between a leading thread and the trailing thread is limited to buffer overflow/underflow detection. Other embodiments are described and claimed.

REFERENCES:
patent: 6598122 (2003-07-01), Mukherjee et al.
patent: 6757811 (2004-06-01), Mukherjee
patent: 6792525 (2004-09-01), Mukherjee et al.
patent: 6823473 (2004-11-01), Mukherjee
patent: 6854051 (2005-02-01), Mukherjee
patent: 6854075 (2005-02-01), Mukherjee et al.
patent: 7243262 (2007-07-01), Mukherjee et al.
patent: 7353365 (2008-04-01), Mukherjee et al.
patent: 7373548 (2008-05-01), Reinhardt et al.
patent: 7444497 (2008-10-01), Reinhardt et al.
patent: 7581152 (2009-08-01), Mukherjee et al.
patent: 2001/0034854 (2001-10-01), Mukherjee
patent: 2001/0037447 (2001-11-01), Mukherjee et al.
patent: 2002/0023202 (2002-02-01), Mukherjee
patent: 2005/0193283 (2005-09-01), Reinhardt et al.
Liu, J., et al., “Performance RDMA-Based MPI Implementation over InfiniBand,” ICS, San Francisco, CA, Jun. 23-26, 2003, pp. 295-304.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus and method for redundant software thread computation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for redundant software thread computation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for redundant software thread computation will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4181532

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.