Apparatus and method for reducing power consumption of a...

Details Apparatus and method for reducing power consumption of a... Apparatus and method for reducing power consumption of a...

2006-11-02

2009-10-27

Patel, Nitin C (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S300000, C713S322000

Reexamination Certificate

active

07610499

ABSTRACT:
A computer system has a processor and a queue for storing instructions for execution by the processor. The processor is capable of being clocked at a plurality of different clock frequencies. In one embodiment, the clocking frequency is determined by estimating a short or long term load associated with the stored instructions. In another embodiment, the clocking frequency is determined by analyzing a set of the stored instructions.

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