Apparatus and method for reducing memory access conflict

Details Apparatus and method for reducing memory access conflict Apparatus and method for reducing memory access conflict

2011-06-07

2011-06-07

Choe, Yong (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S209000, C711SE12078, C365S063000

Reexamination Certificate

active

07958321

ABSTRACT:
Provided are an apparatus and a method of reducing memory access conflict. An apparatus for reducing memory access conflict when a plurality of data processing elements perform simultaneous access to a memory including a plurality of pages, each of which includes a plurality of subpages, the apparatus comprising: an access arbiter mapping a subpage division address corresponding to least significant bits of a memory access address received from each of the data processing elements to another address having a same number of bits as the subpage division address in order for data to be output from each of the subpages in a corresponding page at a time of the simultaneous access; and a selector, prepared for each of the pages, selecting to output one of the data output from the subpages using the mapped results.

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