Apparatus and method for reducing leakage of unused buffers...

Details Apparatus and method for reducing leakage of unused buffers... Apparatus and method for reducing leakage of unused buffers...

2005-07-19

2008-12-09

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S113000, C326S038000

Reexamination Certificate

active

07463061

ABSTRACT:
A reduced-leakage interconnect circuit includes a buffer having an input and an output, at least one multiplexer transistor coupled between a multiplexer input node and the input of the buffer, and a fixed-state multiplexer transistor coupled between a fixed-state multiplexer input node and the input of the buffer, the fixed-state multiplexer input node having a potential of either less than zero volts or more than VCCpresent on it.

REFERENCES:
patent: 5200907 (1993-04-01), Tran
patent: 6271685 (2001-08-01), Nagasawa et al.
patent: 6720797 (2004-04-01), Sasaki
patent: 6768338 (2004-07-01), Young et al.

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