Apparatus and method for reducing information leakage...

Details Apparatus and method for reducing information leakage... Apparatus and method for reducing information leakage...

2006-05-26

2010-11-09

Shah, Sanjiv (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S130000, C711S141000, C711S156000

Reexamination Certificate

active

07831777

ABSTRACT:
Apparatus and methods for reducing information leakage between processes sharing a cache are disclosed. In one embodiment, an apparatus includes execution logic, a cache memory, and cache security logic. The execution unit is to execute a plurality of processes. The cache memory is to be shared between the plurality of processes. The cache security logic is to cause a stored cache state to be loaded into the cache memory.

REFERENCES:
patent: 5845331 (1998-12-01), Carter et al.
patent: 6216199 (2001-04-01), DeKoning et al.
patent: 2002/0080190 (2002-06-01), Hamann et al.

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