Apparatus and method for reducing Bit Error Rates (BER) and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S780000, C714S794000

Reexamination Certificate

active

07032156

ABSTRACT:
An Forward Error Correction (FEC) apparatus and method for reducing Bit error rates (BER) and Frame Error Rates (FER) using turbo decoding in a digital communication system. In a constituent decoder for decoding a turbo code, a first adder calculates the LLR of a received code symbol by calculating the difference between the probability of the code symbol being 1 and that of the code symbol being 0 at an arbitrary state of a turbo decoding trellis. A second adder adds the transmission information and a priori information of the code symbol. A third adder calculates the difference between the outputs of the first and second adders as extrinsic information. A first multiplier multiplies the output of the third adder by a predetermined weighting factor as a feedback gain. A correction value calculator calculates a correction value using the difference between the best metric and the second best metric of the code symbol. A fourth adder adds the correction value to the output of the first multiplier.

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