Apparatus and method for recovering a clock signal which is embe

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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375375, 375376, 370518, 327159, 331 60, H04L 700

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active

058504222

ABSTRACT:
A method of recovering a clock signal which is embedded in an incoming data stream. The method includes the steps of providing the incoming data stream to a data sampler circuit, first operating the data sampler circuit to select one of a plurality of clock phases wherein the selected clock phase is indicative of the embedded clock signal, generating a recovered clock signal based on the selected clock phase, second operating a retiming circuit in a normal data tracking mode to retime the incoming data stream based on the recovered clock signal, and disabling operation of the data sampler circuit while the retiming circuit is operating in the normal data tracking mode. An apparatus for recovering a clock signal which is embedded in an incoming data stream is also disclosed.

REFERENCES:
patent: 5022056 (1991-06-01), Henderson et al.
patent: 5276716 (1994-01-01), Wincn
patent: 5491729 (1996-02-01), Co et al.
patent: 5550860 (1996-08-01), Georgiou et al.
patent: 5574756 (1996-11-01), Jeong

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