Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
1999-07-12
2004-05-18
Kim, Matthew (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S205000, C709S226000
Reexamination Certificate
active
06738889
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to the data processing field. More specifically, the present invention relates to the field of addressing schemes in computer systems.
2. Background Art
Since the dawn of the computer age, computer systems have evolved into extremely sophisticated devices that may be found in many different settings. Computer systems typically include a combination of hardware (e.g., semiconductors, circuit boards, etc.) and software (e.g., computer programs). As advances in semiconductor processing and computer architecture push the performance of the computer hardware higher, more sophisticated computer software has evolved to take advantage of the higher performance of the hardware, resulting in computer systems today that are much more powerful than just a few years ago.
Computer systems have addressing capabilities that are defined by the computer hardware. The address space of a computer system is the range of addresses available to reference data, instructions, etc., and is determined by the size (in bits) of the address. The address size is one of the fundamental architectural features of a computer system. Early computer systems were single-user computers that could handle only a single task at a time, mapping all data into a single address space, and swapping data into and out of the address space whenever a new task needed to be performed. Later, computers were developed that supported multiple users and processes. A computer system that supports multiple processes must manage the allocation of the address space among the different processes. Because the addresses needed for all the processes that might run on a computer system typically exceeds the physical address space defined by the address, a separate address space is typically allocated to each process, resulting in multiple virtual address spaces. This type of addressing is known as “local addressing”, because each process has its own virtual address space that is local to the process, and cannot be seen by other processes.
In a local addressing scheme, having multiple virtual address spaces mapped onto a physical (real) address space may very well result in a physical address being mapped to the same virtual address in different processes. When a process is loaded into main memory, a mapping mechanism maps virtual addresses in the virtual address space of the process to physical addresses in the main memory of the computer system. This mapping function increased the complexity of the operating system that had to perform the virtual address mapping, but was required to allow multiple virtual address spaces to exist that are collectively larger than the physical address space.
An alternative addressing scheme to local addressing is known as “global addressing”, where one address space is used that is sufficiently large that it can be divided up among processes without overlapping between them. Each process is allocated a unique portion of the large global address space. The benefit of a global addressing scheme is that programs and data in a computer system can be assigned persistent, unique logical addresses in the large system address space. Because these logical addresses are not duplicated, they can be used to identify data either in main memory or in secondary memory, such as on a hard disk drive. For this reason, the global addressing scheme is sometimes referred to as a “single level store” architecture. Examples of computer systems that use global addressing schemes are the IBM System/38 computer system formerly manufactured and distributed by IBM Corporation, the IBM AS/400 computer system currently manufactured and distributed by IBM, and the Opal system developed at the University of Washington. For additional background concerning the IBM System/38 and IBM AS/400 system, see IBM System/38 Technical Developments (IBM, 1978); IBM Application System/400 Technology (IBM, 1988); and IBM Application System/400 Technology Journal, Version 2 (IBM, 1992). The Opal system is described in a series of academic papers, including J. Chase et al., “Opal: A Single Address Space System for 64-bit Architectures”, Proc. IEEE Workshop on Workstation Operating Systems (April 1992).
Current IBM AS/400 computer systems can operate in different modes. When an AS/400 system is operating in AS/400 mode, it operates with a single level store (i.e., global addressing). When an AS/400 system is operating in RS/6000 mode, it operates with multiple virtual address spaces (i.e., local addressing). While the AS/400 system supports either of these addressing schemes, it currently does not support both of them at the same time. Once the mode is set, the addressing scheme is set until the mode is changed at a later time. Without an apparatus and method for providing simultaneous local and global addressing, the computer industry will continue to suffer from the requirement of selecting either local or global addressing to the exclusion of the other.
DISCLOSURE OF INVENTION
According to the present invention, an apparatus and method provide simultaneous local and global addressing capabilities. A global address space is defined that may be accessed by all processes. In addition, each process has a local address space that is local (and therefore available) only to that process. An address translation mechanism is implemented, preferably in hardware, to compare an address to defined addresses for local and global addressing and to detect when a virtual address computation result would go outside a boundary for the appropriate addressing scheme. The address translation mechanism maps a virtual address to a corresponding physical address, and uses different criteria depending on whether the address is local or global. The address translation mechanism allows an instruction to operate on both local and global addresses by determining at run-time which address space is referenced, and by performing the necessary translation and boundary checking for either global or local address space, whichever is accessed by the instruction. By providing both global and local addressing for the same instructions, the apparatus and method of the present invention provide great flexibility in addressing, allowing a computer program to benefit from the advantages of both addressing modes.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings.
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Pending patent application, Munroe et al., “Computer System Having Shared Address Space Among Multiple Virtual Address Spaces”, Ser. No. 08/771,550, filed Dec. 23, 1996.
IBM System/38 Technical Developments manual, p. 1-110, (1978).
Chase et al., “Some Issues for Single Address Space Systems”, Dept. of Computer Science and Eng., FR-35, Univ. of Washington.
Chase et al., “Opal: A Single Address Space System for 64-bit Architectures”, Dept. of Computer Science and Eng., Univ. of Washington.
Godtland Paul LuVerne
Timms, Jr. George David
International Business Machines - Corporation
Kim Matthew
Martin Derek P.
Martin & Associates LLC
Vital Pierre M.
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