Electrical computers and digital processing systems: multicomput – Computer-to-computer data addressing
Reexamination Certificate
2007-01-09
2007-01-09
Follansbee, John (Department: 2154)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data addressing
C714S774000, C714S790000
Reexamination Certificate
active
10073458
ABSTRACT:
A system architecture for ensuring QoS levels to different inter-media streams or media streams of an intra-media stream. In such a system, an RLP layer classifies transmission data streams by priority level and separates each transmission data stream into data streams of predetermined lengths according to characteristics of the data streams. A MUX layer segments the separated data streams according to a data rate. A plurality of MQC channels encode the segmented data at a predetermined code rate, repeat code symbol sequences with higher priority levels, and puncture code symbol sequences with lower priority levels. A serial concatenator serially concatenates the repeated and punctured code symbol sequences.
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Kim Dae-Gyun
Koo Chang-Hoi
Park Dong-Seek
Follansbee John
Patel Ashok
Samsung Electronics Co,. Ltd.
The Farrell Law Firm
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