Apparatus and method for processing misaligned load instructions

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer

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711201, 712300, G06F 9312

Patent

active

061122971

ABSTRACT:
One aspect of the invention relates to a method for processing load instructions in a superscalar processor having a data cache and a register file. In one embodiment, the method includes the steps of dispatching a misaligned load instruction to access a block of data that is misaligned in the cache; while continuing to dispatch aligned instructions: generating a first access and a final access to the cache in response to the misaligned load instruction; storing data retrieved from the first access until data from the final access is available; reassembling the data from the first and final access into the order required by the load instruction; and storing the re-assembled data to the register file.

REFERENCES:
patent: 4287561 (1981-09-01), Liptay
patent: 4814976 (1989-03-01), Hansen et al.
patent: 5557763 (1996-09-01), Seuter et al.
patent: 5577200 (1996-11-01), Abramson et al.
patent: 5802556 (1998-09-01), Patel et al.

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