Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1995-11-27
1997-12-30
Westin, Edward P.
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326 17, 326 86, H03K 19017
Patent
active
057035016
ABSTRACT:
An apparatus and method is provided for precharging a conductor within a bus containing a plurality of conductors. The apparatus comprises a precharge circuit which drives an intermediate voltage between VDD and ground upon respective conductors. The precharge driver maintains the intermediate voltage within a range between a first voltage level and a second voltage level, the second voltage level being higher in magnitude than the first voltage level. The precharge voltage defined within an intermediate voltage range is chosen to consume minimal power within the precharge driver. An isolation device can be provided on each conductor for isolating the intermediate, precharged value from a receiver circuit input so as to minimize power consumption of the overall circuit. Precharging to an intermediate value causes logic-driven transitions within the bus to occur at a faster frequency than if the bus were precharged to full rail. Intermediate precharge also minimizes noise crosstalk from transitioning neighboring conductors to a target conductor which is desired not to transition, and wherein the target conductor is interposed between the neighboring conductors.
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Advanced Micro Devices , Inc.
Daffer Kevin L.
Driscoll Benjamin D.
Westin Edward P.
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