Apparatus and method for pre-verifying a computer instruction se

Details Apparatus and method for pre-verifying a computer instruction se Apparatus and method for pre-verifying a computer instruction se

1993-06-24

1999-07-20

Maung, Zarni

Electrical computers and digital processing systems: processing

Processing control

Branching

712246, G06F 900

Patent

active

059251255

ABSTRACT:
A Test Operation-Code (TSTOP) instruction pre-verifies the validity of a target instruction op-code prior to execution of the target instruction. The pre-verification function, contained within CPU execution unit microcode, sets a return value in a program status word to indicate one of four conditions:

REFERENCES:
patent: 3771138 (1973-11-01), Celtruda et al.
patent: 4439828 (1984-03-01), Martin
patent: 4441153 (1984-04-01), Bullions, III et al.
patent: 4710866 (1987-12-01), Zolnowsky et al.
patent: 4875156 (1989-10-01), Tanagawa et al.
patent: 5168557 (1992-12-01), Shibaya
patent: 5269017 (1993-12-01), Hayden et al.

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