Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-08-29
2006-08-29
Bragdon, Reginald G. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S122000, C711S202000, C711S203000, C711S206000, C711S209000
Reexamination Certificate
active
07099999
ABSTRACT:
A computer system includes a main memory, at least one processor, and at least one level of cache. The system maintains reference history data with respect to each addressable page in memory, preferably in a page table. The reference history data is preferably used to determine which cacheable sub-units of the page should be pre-fetched to the cache. The reference history data is preferably an up or down counter which is incremented if the cacheable sub-unit is loaded into cache and is referenced by the processor, and decremented if the sub-unit is loaded into cache and is not referenced before being cast out. The reference counter thus expresses an approximate likelihood, based on recent history, that the sub-unit will be referenced in the near future.
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David A. Patterson and John L. Hennessy, Computer Architecture A Quantitative Approach, 1996, Morgan Kaufmann Publishers, Inc., Second Edition, p. 445-446.
Bragdon Reginald G.
Gu Shawn
Truelson Roy W.
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