Electrical computers and digital processing systems: support – Computer power control
Reexamination Certificate
2000-12-11
2002-07-30
Etienne, Ario (Department: 2155)
Electrical computers and digital processing systems: support
Computer power control
C713S320000, C713S323000, C713S324000
Reexamination Certificate
active
06427210
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of power management, and more particularly, to power management of embedded subsystems such as embedded modems.
2. Description of Related Art
With the proliferation of portable, battery-powered electronic devices, power management has become a critical issue for device performance. In order to extend the usable life of the battery power source, sophisticated power management techniques have been employed. In personal computers, the system microprocessor (Intel) and operating system (Microsoft) work together to conserve system power by controlling system resources. Various system devices may be monitored, and power use regulated by cutting or reducing power to inactive devices. For example, after a specified period of inactivity, a timer in the operating system may trigger the system display monitor to enter a “sleep” mode to reduce power consumption. After another interval, the monitor may be completely shutdown, further reducing power consumption. Similarly, power to peripheral devices or plug-in cards can be controlled. These power management techniques work due to the wide adoption of the Intel/Microsoft implemented solutions.
In the embedded device market, however, these solutions are inadequate since many different microprocessors and operating systems are used, each with a different power management scheme. With increased circuit integration, many manufacturers are producing a “system-on-a-chip.” In other words, many functions that used to be performed by separate circuitry, are now performed on a single chip. For example, modems may now be embedded into a device, without being on a separate peripheral. Unless power management techniques are utilized, the various embedded subsystems can severely drain the battery if they are powered on, but are not used. In the case of a modem, power is continually being consumed even though the user may only access the modem 10% of the time. Since the modem is embedded, it cannot simply be removed. Thus, the “stand-by” power consumption of the embedded systems is a significant source of power drain. In fact, testing has shown that an embedded modem may draw 6-8 mA of current even in a “stop” mode.
In many prior art attempts to manage power usage in an embedded subsystem, additional power management circuitry is used. This additional circuitry, however, is itself a source of power drain. Also, merely cutting the power to the subsystem does not provide satisfactory results. As shown in
FIG. 1
, a modem subsystem
2
is connected to a power node
24
. In order to disable power to the subsystem when the subsystem is not in use, power supplied through the power node
24
is simply cut-off. This may cause several problems, however. First, since the signal applied to the system bus is indeterminate, the system bus may crash, thereby locking-up the system. The modem may also lock-up or otherwise fail, without special power down processing. Thus, there is a need for an improved power management system for embedded subsystems, such as modems.
SUMMARY OF THE INVENTION
The present invention is an apparatus and method for power management of embedded electronic subsystems. A power management control circuit for managing power to an embedded subsystem includes a subsystem power node connected to a first section of the embedded electronic subsystem and a bias voltage node connected to a second section of the embedded electronic subsystem. A power switch is connected between a power supply and the subsystem power node. By separating the power subsystem node from the bias voltage node, power can be removed from the subsystem, while still providing the necessary bias voltage to the electronic static discharge (ESD) diodes. This prevents the signals applied to the system bus by the subsystem from causing bus contention or system bus lock-ups.
In order to take full advantage of the present invention, the power needs to be removed and restored in a specific order. In order to remove power from a subsystem, all system bus activities must first be halted. The bias voltage to the bias voltage node is maintained, All subsystem activity is suspended and then the power switch is switched to remove power to the power subsystem node. All system bus activities may then be resumed after a sufficient time interval to insure the subsystem discharge has stabilized.
To restore power to the subsystem, all system bus and subsystem activities are halted. Power is restored to the subsystem power node, and system bus activities are resumed after a sufficient time interval. The host system then resets the embedded subsystem.
REFERENCES:
patent: 5416351 (1995-05-01), Ito et al.
patent: 5546591 (1996-08-01), Wurzburg et al.
patent: 5724297 (1998-03-01), Noda et al.
patent: 6163845 (2000-12-01), Zhao et al.
Rhodes F. Matthew
Zhao Dongfeng
Conexant Systems Inc.
Etienne Ario
Procopio Cory Hargreaves & Savitch LLP
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