Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Reexamination Certificate
2006-11-28
2006-11-28
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Generating a particular pattern/sequence of addresses
C711S213000, C711S218000
Reexamination Certificate
active
07143264
ABSTRACT:
An apparatus and method for performing data access in accordance with memory access patterns are described. In one embodiment, the method includes the determination, in response to a memory access instruction, of a memory access pattern of data requested by the memory access instruction. Once the memory access pattern is determined, the data requested by the memory access instruction is accessed according to the determined memory access pattern. Finally, once the data is accessed, the data is processed according to the memory access instruction. Accordingly, in this embodiment of the present invention, data is accessed according to memory access patterns including zig-zag patterns scan, Zerotree scan, bit plane extraction, fine granularity scalability or the like.
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Chen Yen-Kuang
Debes Eric
Holliman Matthew J.
Yeung Minerva M.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Moazzami Nasser
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