Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor
Reexamination Certificate
2007-03-02
2008-12-09
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Function of and, or, nand, nor, or not
Field-effect transistor
C326S121000, C326S127000, C326S083000, C327S112000
Reexamination Certificate
active
07463068
ABSTRACT:
A circuit for protection of a transceiver input includes an input transistor and a first resistor connected between the drain of the input transistor and an input node. A plurality of reverse-biased diodes connected between a supply voltage and the input node. An output node is connected to the source of the input transistor. A first forward-biased diode connected between the power supply and the plurality of reverse-biased transistors. A second forward-biased diode and a second resistor are connected between the first forward biased transistor and the gate of the input transistor. A pre-driver circuit includes first and second transistors forming a differential pair and driven by a differential input voltage. A third transistor is connected between sources of the first and second transistors and ground. First and second resistors are connected to drains of the first and second transistors, respectively. A fourth transistor is connected between a power supply voltage and the first and second resistors. Fifth and a sixth transistors are connected in series between the power supply voltage and the first and second resistors, wherein a node between the fifth and second transistors is connected to a gate of the fourth transistor.
REFERENCES:
patent: 3562547 (1971-02-01), Brode et al.
patent: 3596137 (1971-07-01), Kirsch
patent: 4739437 (1988-04-01), Morgan
patent: 6025742 (2000-02-01), Chan
patent: 6212050 (2001-04-01), Haider
patent: 6316964 (2001-11-01), Watarai
patent: 6518797 (2003-02-01), Yang
patent: 6720805 (2004-04-01), Haas
patent: 7061273 (2006-06-01), Wang et al.
Pelgrom, M., et al., “A 3/5 V Compatible I/O Buffer,” IEEE Journal of Solid-State Circuits, vol. 30, No. 7, pp. 823-825 (Jul. 1995).
Takahashi, M., et al., “3.3V-5V Compatible I/O Circuit without Thick Gate Oxide,” IEEE 1992 Custom Integrated Circuits Conference, 4 pages.
Lee Wee Teck
Teo Tian Hwee
Yun Tu
Broadcom Corporation
Sterne Kessler Goldstein & Fox PLLC
Tan Vibol
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