Electrical computers and digital processing systems: support – Data processing protection using cryptography – By stored data protection
Reexamination Certificate
2003-06-25
2008-12-30
Truong, Thanhnga B (Department: 2135)
Electrical computers and digital processing systems: support
Data processing protection using cryptography
By stored data protection
C713S161000, C380S262000, C380S277000
Reexamination Certificate
active
07472285
ABSTRACT:
A method and apparatus for memory encryption with reduced decryption latency. In one embodiment, the method includes reading an encrypted data block from memory. During reading of the encrypted data block, a keystream used to encrypt the data block is regenerated according to one or more stored criteria of the encrypted data block. Once the encrypted data block is read, the encrypted data block is decrypted using the regenerated keystream. Accordingly, in one embodiment, encryption of either random access memory (RAM) or disk memory is performed. A keystream is regenerated during data retrieval such that once the data is received, the data may be decrypted using a single clock operation. As a result, memory encryption is performed without exacerbating memory latency between the processor and memory.
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Graunke Gary L.
Rozas Carlos
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Truong Thanhnga B
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