Apparatus and method for low power, single-ended sensing in...

Details Apparatus and method for low power, single-ended sensing in... Apparatus and method for low power, single-ended sensing in...

2008-06-09

2010-11-09

Tran, Andrew Q (Department: 2824)

Static information storage and retrieval

Read/write circuit

Particular read circuit

C365S204000, C365S203000, C365S227000, C365S230050, C365S156000

Reexamination Certificate

active

07830727

ABSTRACT:
An apparatus and method for low power, single-ended sensing in a multi-port static random access memory (SRAM) using pre-discharged bit lines includes holding a bit line associated with the memory cell at a zero voltage potential when the memory cell is not being accessed; releasing the bit line from being held at a zero voltage potential when the memory cell is being accessed; charging the bit line to a first voltage potential greater in value than the zero voltage potential during an access of the memory cell, wherein charging the bit line to a first voltage potential occurs for a first predetermined period of time after access to the memory cell has begun; and sensing the memory cell contents during an access of the memory cell, wherein sensing of the memory cell contents occurs for a second predetermined period of time after access to the memory cell has begun.

REFERENCES:
patent: 4656361 (1987-04-01), McIntyre
patent: 6262912 (2001-07-01), Sywyk et al.
patent: 7161868 (2007-01-01), Morishima
patent: 7272061 (2007-09-01), Saleh
patent: 2002/0172076 (2002-11-01), Marotta et al.
patent: 2004/0243758 (2004-12-01), Notani
patent: 2007/0263435 (2007-11-01), Nii

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