Apparatus and method for low power routing of signals in a...

Details Apparatus and method for low power routing of signals in a... Apparatus and method for low power routing of signals in a...

2005-10-18

2005-10-18

Le, Amanda T. (Department: 2634)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C326S038000, C327S158000

Reexamination Certificate

active

06956920

ABSTRACT:
A signal routing apparatus comprises a register bank to store a set of data signals. A delay locked loop generates a set of phase displaced clock signals. A phase controlled read circuit sequentially routes the set of data signals from the register bank in response to the phase displaced clock signals. A Low Voltage Differential Signaling buffer connected to the phase controlled read circuit transmits the data signals in a Low Voltage Differential Signaling mode. The phase displaced clock signals operate in lieu of a higher clock rate in order to reduce power consumption.

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patent: 6252419 (2001-06-01), Sung et al.
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patent: 6535031 (2003-03-01), Nguyen et al.
patent: WO 99/55000 (1999-10-01), None

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