Apparatus and method for isochronous arbitration to schedule...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C365S222000

Reexamination Certificate

active

07020741

ABSTRACT:
For use with a memory controller in a data processor that is capable of executing memory refresh requests to refresh a memory of the data processor, an apparatus and method is disclosed for scheduling execution of the memory refresh requests. The apparatus comprises a periodic memory refresh hint unit that is capable of sending to the memory controller a data signal that comprises a periodic memory refresh hint. The periodic memory refresh hint informs the memory controller of an optimal time for a memory refresh to occur. The memory controller may immediately execute a memory refresh request when it arrives or delay the execution of the memory refresh request until a more opportune time. This feature enables the memory controller to reduce memory access latency in scheduling memory transactions.

REFERENCES:
patent: 6167484 (2000-12-01), Boyer et al.
patent: 6286083 (2001-09-01), Chin et al.
patent: 6741515 (2004-05-01), Lazar et al.
patent: 2001/0010066 (2001-07-01), Chin et al.
patent: 2002/0065981 (2002-05-01), Jenne et al.

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