Apparatus and method for initializing a master/checker fault det

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39518208, 371 671, 371 681, G06F 1116, G06F 1118, G06F 702

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active

057580588

ABSTRACT:
A method and apparatus for initializing both processors in a master/checker fault detecting microprocessor. A microcode initialization routine is run by each processor upon reset of both of the processors in the pair. The routines cause each processor to be initialized, such that the two processors complete initialization at the same time and operate in a lock-step manner.

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