Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2006-01-03
2006-01-03
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S229000
Reexamination Certificate
active
06983361
ABSTRACT:
An apparatus and method for implementing a switch instruction in the IA64architecture is provided. With the apparatus and method, a first register is used to identify whether a low is either 0, 1 or some other value, and a second register is used to identify a shift amount. The first register is then shifted by the shift amount in the second register. The first register value is then moved to the predicate register set in the IA64architecture, thereby identifying which branch is to be taken. If the first register is shifted outside the predicate registers, a default address is provided.
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Sinclaim et al, “ASIC Design for Conditional Nested Loops with Predicate Registers”, Aug. 11, 1999, Circuits and Systems, 1999. 42nd Midwest Symposium on, vol. 2, pp. 874-877.
Chan Eddie
Emile Volel
Harkness Charles
International Business Machines - Corporation
Walder, Jr. Stephen J.
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