Apparatus and method for implementing a bank interlock scheme an

Details Apparatus and method for implementing a bank interlock scheme an Apparatus and method for implementing a bank interlock scheme an

1997-09-29

1999-09-28

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

36523003, 36518509, 36518904, G11C 700

Patent

active

059599111

ABSTRACT:
Testing of a multibank memory device having a plurality of memory banks which includes activating two or more of the plurality of memory banks for participation in the test; selecting at least one common memory address corresponding to a memory cell within each activated bank; simultaneously writing test data into the selected memory cell of each activated bank; simultaneously reading the test data previously written into the selected memory cell of each activated bank; and comparing the test data read from each activated bank with the test data from each other activated bank and if a match is determined to exist, then indicating a pass condition, else indicating a fail condition.

REFERENCES:
patent: 4752929 (1988-06-01), Kantz et al.
patent: 4782486 (1988-11-01), Lipcon et al.
patent: 4860259 (1989-08-01), Tobita
patent: 4885748 (1989-12-01), Hoffmann et al.
patent: 5148398 (1992-09-01), Kohno
patent: 5231605 (1993-07-01), Lee
patent: 5671392 (1997-09-01), Parris et al.
patent: 5706234 (1998-01-01), Pilch, Jr. et al.

Affiliated with

Also associated with

Rating

Apparatus and method for implementing a bank interlock scheme an does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for implementing a bank interlock scheme an, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for implementing a bank interlock scheme an will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-711305