Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-05-29
2007-05-29
Wilson, Yolanda L (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S030000, C712S227000, C717S128000
Reexamination Certificate
active
10729326
ABSTRACT:
When a NEW SECONDARY CODE EXECUTION START POINT signal is generated in a target processor during a test procedure after the return from an interrupt service routine (i.e., an original secondary code sequence), a sync marker is generated in a program counter trace stream. The sync marker includes a plurality of packets, the packets identifying that the sync marker is has been generated as a result of the NEW SECONDARY CODE EXECUTION START POINT signal. The new secondary program code start point sync marker identifies the absolute program counter address at the time of the generation of the NEW SECONDARY CODE EXECUTION START POINT signal and relates the NEW SECONDARY CODE EXECUTION START POINT signal sync marker to a timing trace stream.
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patent: 5802272 (1998-09-01), Sites et al.
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patent: 6530076 (2003-03-01), Ryan et al.
patent: 2004/0064685 (2004-04-01), Nguyen et al.
patent: 2004/0133824 (2004-07-01), Swoboda et al.
Agarwala Manisha
Swoboda Gary L.
Thome Bryan
Brady W. James
Holloway William W.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Wilson Yolanda L
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