Apparatus and method for generating a decoding clock signal in r

Details Apparatus and method for generating a decoding clock signal in r Apparatus and method for generating a decoding clock signal in r

1997-10-16

2000-10-17

Pham, Chi H.

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

370505, 327141, H04L 700, H04L 2500, H04L 2540

Patent

active

061342882

ABSTRACT:
Disclosed is an apparatus and a method for generating decoding clock signals in response to a period of write and read clock signals for decoding transmission data, which is suppressed in a form of punctured code at a code rate. The apparatus according to the present invention comprises a) a clock generator receiving a control signal and a code rate from a transmission part, for rearranging a suppressed data; b) a controller receiving a write clock signal from an external circuit and a read clock signal from the clock generator, for controlling a period of a read clock signal wherein the period of the read clock signal is correspondent to the number of data stored in the memory; c) a decoding clock generator receiving a system clock signal from an external circuit and the control clock signal from the controller, for outputting a decoding clock signal.

REFERENCES:
patent: 5029331 (1991-07-01), Heichler et al.
patent: 5200982 (1993-04-01), Weeber
patent: 5452010 (1995-09-01), Doornink

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