Apparatus and method for forward error correction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S786000

Reexamination Certificate

active

07120848

ABSTRACT:
The provided forward error correction (FEC) apparatus for a transmission system includes a low pass filter (LPF) passing only a low frequency component of an input signal having a predetermined transmission rate; an AC power meter converting an energy value of an signal output from the LPF into a DC voltage value; a logarithm amplifier converting the exponentially varying DC voltage value from the AC power meter into a linear logarithmically varying DC voltage value; a digital signal processor (DSP) determining the transmission rate of the input signal according to a magnitude of the linear DC voltage value and outputting a control signal according to the transmission rate; a clock generator receiving the control signal and generating a clock signal according to the control signal; and a FEC module receiving the clock signal and performing FEC operation on the received signal. A method for FEC is also provided.

REFERENCES:
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patent: 5978428 (1999-11-01), Hayashi
patent: 0944212 (1999-09-01), None
patent: 2001-053814 (2001-02-01), None
patent: WO01/05067 (2001-01-01), None
Tan et al., A 70Mb/s Variable-rate 1024QAM cable receiver IC with integrated 10b ADC and FEC decoder, Feb. 6, 1998, ISSCC digest of technical papers, google.com, p. 200-202, retrived Aug. 24, 2005.
Pierobon st al., performances of an analog error monitor with parity check codes, Mar. 1980, electronic systems for remote sensing and ranging: international sicentific congress on electronics, p. 285-290.

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