Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2008-06-17
2008-06-17
Baker, Stephen M. (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C375S299000, C375S347000, C714S755000
Reexamination Certificate
active
07389464
ABSTRACT:
In a mobile communication system including a transmitter and a receiver, an LDPC code is generated by encoding received information data such that a fifth partial matrix obtained by combining a second partial matrix having even-numbered columns of a first partial matrix corresponding to the information data with a fourth partial matrix having odd-numbered columns of a third partial matrix corresponding to a parity, and an eighth partial matrix obtained by combining a sixth partial matrix having odd-numbered columns of the first partial matrix with a seventh partial matrix having even-numbered columns of the third partial matrix correspond to a ninth partial matrix obtained by exclusive-ORing the first partial matrix and the third partial matrix and a parity check matrix having a predetermined rank in a binary field. A space-time LDPC code is generated by spatial-mapping the LDPC code according to a predetermined spatial mapping scheme.
REFERENCES:
patent: 7013116 (2006-03-01), Ashikhmin et al.
Blanksby, A., et al., “A 690-mW 1-Gb/s 1024-b, Rate-1/2 Low-Density Parity-Check Code Decoder”, IEEE Journal of Solid-State Circuits, vol. 37, No. 3, Mar. 2002, pp. 404-412.
Chae Chan-Byoung
Jeong Hong-Sil
Kim Jae-Yoel
Yoon Seok-hyun
Baker Stephen M.
Samsung Electronics Co,. Ltd
The Farrell Law Firm PC
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