Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Treating process fluid by means other than agitation or...
Reexamination Certificate
2000-06-26
2002-09-24
Phasge, Arun S. (Department: 1741)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Treating process fluid by means other than agitation or...
C205S123000, C204S274000, C204S275100
Reexamination Certificate
active
06454927
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to deposition of a metal layer onto a wafer or other substrate. More particularly, the present invention relates to an electro-chemical deposition system for forming a metal layer on a substrate.
2. Background of the Related Art
Sub-quarter micron, multi-level metallization is one of the key technologies for the next generation of ultra large scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
As circuit densities increase, the widths of vias, contacts and other features, as well as the dielectric materials between them, decrease to less than 250 nanometers, whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increases. Many traditional deposition processes, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD), have difficulty filling structures where the aspect ratio exceeds 4:1, and particularly where it exceeds 10:1. Therefore, there is a great amount of ongoing effort being directed at the formation of void-free, nanometer-sized features having high aspect ratios wherein the ratio of feature height to feature width can be 4:1 or higher. Additionally, as the feature widths decrease, the device current remains constant or increases, which results in an increased current density in the feature.
Elemental aluminum (Al) and its alloys have been the traditional metals used to form lines and plugs in semiconductor processing because of aluminum's perceived low electrical resistivity, its superior adhesion to silicon dioxide (SiO
2
), its ease of patterning, and the ability to obtain it in a highly pure form. However, aluminum has a higher electrical resistivity than other more conductive metals such as copper, and aluminum also can suffer from electromigration leading to the formation of voids in the conductor.
Copper and its alloys have lower resistivities than aluminum and significantly higher electromigration resistance as compared to aluminum. These characteristics are important for supporting the higher current densities experienced at high levels of integration and increase device speed. Copper also has good thermal conductivity and is available in a highly pure state. Therefore, copper is becoming a choice metal for filling sub-quarter micron, high aspect ratio interconnect features on semiconductor substrates.
Despite the desirability of using copper for semiconductor device fabrication, choices of fabrication methods for depositing copper into very high aspect ratio features, such as a 4:1, having 0.35 micron (or less) wide vias are limited. As a result of these process limitations, plating, which had previously been limited to the fabrication of lines on circuit boards, is now being used to fill vias and contacts on semiconductor devices.
Metal electroplating is generally known and can be achieved by a variety of techniques. A typical method generally comprises physical vapor depositing a barrier layer over the feature surfaces, physical vapor depositing a conductive metal seed layer, preferably copper, over the barrier layer, and then electroplating a conductive metal over the seed layer to fill the structure/feature. Finally, the deposited layers and the dielectric layers are planarized, such as by chemical mechanical polishing (CMP), to define a conductive interconnect feature.
FIG. 1
is a flow circuit schematic diagram of a prior art electrochemical plating system
100
for depositing copper or other metals on a wafer or other substrate. The plating system
100
includes an electroplating tool platform
102
which has one or more electroplating cells
104
in which an electrolyte containing the material to be deposited, is circulated through each cell, to deposit the deposition material onto a wafer disposed within the cell
104
. The deposition material is added to the electrolyte typically in the form of a chemical composition such as, for example, copper sulfate. The process of adding the deposition chemical to the electrolyte is often referred to as “dosing” and is usually performed by an electrolyte replenishment platform such as that indicated at
106
.
The electrolyte replenishment platform
106
, also often referred to as a “chemical cabinet,” typically includes a large tank
108
in which the deposition chemical is mixed with the electrolyte. An analyzer
110
analyzes the chemical composition of the electrolyte and indicates whether additional deposition chemical or other chemicals should be added to the electrolyte in the tank
108
to maintain a desired composition of the electrolyte.
The electrolyte replenishment platform
106
typically includes a pump
112
to pump the electrolyte from the main tank
108
though a supply line
114
to the electroplating tool platform
102
. To provide a sufficient flow of electrolyte to the cells
104
of the electroplating tool platform
102
, the supply line
124
is often relatively large. For example, to provide a flow of 30 gallons per minute from the electrolyte replenishment platform
106
to the electroplating tool platform
102
, the supply line
124
often has an inner diameter of 1 inch (25 mm) in many systems. Moreover, to save valuable clean room space adjacent to the electroplating tool platform
102
, the electrolyte replenishment platform
106
is often located a relatively large distance from the platform
102
, including being located on another floor of the factory. Hence, many systems have a second, booster pump
116
positioned on the electroplating tool platform
102
to provide sufficient head pressure to the plating cells
104
.
Prior to admitting the electrolyte into the cells
104
, many electroplating tool platforms have one or more filters
118
positioned upstream of the inlets to the cells
104
, to filter the electrolyte from the electrolyte replenishment platform
106
. Positioned downstream of the cells
104
, the electroplating tool platform often has one or more intermediate holding tanks
120
to collect the flow of electrolyte from the cells
104
. The electrolyte is then pumped by yet another pump
122
, via a return line
124
, back to the main tank
108
of the electrolyte replenishment platform
106
for analyzing and dosing if needed. Another filter or set of filters
126
is often provided on the electrolyte replenishment platform
106
to filter the electrolyte before it is admitted to the main tank
108
of the electrolyte replenishment platform
106
.
To maintain the quality of the deposition onto the substrate in the cells, it is often desirable to closely control the temperature of the electrolyte to facilitate the desired chemical reaction in the electrolytic cells
104
. In many systems such as that shown in
FIG. 1
, the main holding tank
108
of the electrolyte replenishment platform
106
typically has a chiller unit installed in the tank
108
to cool the electrolyte to the desired temperature prior to recirculating the electrolyte back into the cells
104
.
The intermediate holding tanks
120
and the main holding tank
108
also usually have various sensors to monitor the electrolyte levels in the tanks. To avoid a potential overflow of hazardous electrolyte from the tanks, the flow rates by the various pumps
112
,
116
and
122
are controlled to lower an excessive level of electrolyte in one tank and pump the excess to the other tank.
REFERENCES:
patent: 5368715 (1994-11-01), Hurley et al.
patent: 5858196 (1999-01-01), Ikenaga
patent: 6113769 (2000-09-01), Uzoh et al.
patent: 6113771 (2000-09-01), Landau et al.
patent: 6136163 (2000-10-01), Cheung
Chao Sandy S.
D'Ambra Allen L.
Denome Mark R.
Olgado Donald J.
Rabinovich Yevgeniy
Applied Materials Inc.
Konrad Raynes Victor & Mann
Phasge Arun S,.
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