Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
2007-05-15
2007-05-15
Du, Thuan (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
C331S17700V
Reexamination Certificate
active
10888470
ABSTRACT:
According to embodiments of the invention, temperature, current, or other physical quantities associated with an integrated circuit, which can also include a processor, may be converted to a digital signal, and that digital signal used to choose a corresponding frequency offset that is added to any pre-established overclocking frequency. Embodiments of the invention allow a user to specify a dynamic range between which the frequency offset is bounded during overclocking of the integrated circuit. The programmable lower limit specifies the frequency where the integrated circuit begins to overclock. The programmable upper limit specifies the maximum overclocking frequency that is allowed. Setting the lower limit to be equal to the upper limit forces overclocking to occur at only the specified value.
REFERENCES:
patent: 6622254 (2003-09-01), Kao
patent: 6665808 (2003-12-01), Schinzel
patent: 2003/0229816 (2003-12-01), Meynard
patent: 2005/0071705 (2005-03-01), Bruno et al.
Chew Chwei-Po
Li Gabriel
Tsai Johnson
Cypress Semiconductor Corp.
Du Thuan
Marger & Johnson & McCollom, P.C.
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