Apparatus and method for dynamic hardening of a digital circuit

Details Apparatus and method for dynamic hardening of a digital circuit Apparatus and method for dynamic hardening of a digital circuit

1997-10-02

1999-09-07

Tokar, Michael

Electronic digital logic circuitry

Reliability

326 21, 326 22, H03K 19003, H03K 1716

Patent

active

059492481

ABSTRACT:
A single event upset (SEU) sensitivity control system (42) dynamically hardens a digital circuit (48) to single event upsets. The sensitivity control system (42) includes an upset rate sensor (66) for detecting a quantity of particles (38) that cause single event upsets. A noise margin control circuit (70) is configured to adjust a noise margin (46) of the digital circuit (48) in response to the quantity of particles (38). Noise margin (46) is increased when a particle density (34) is high to decrease the sensitivity of the digital circuit (48) to single event upsets. Additionally, noise margin (46) is decreased when a particle density (36) is low to decrease the power consumption level of digital circuit (48).

REFERENCES:
patent: 4614884 (1986-09-01), Nagano
patent: 5418473 (1995-05-01), Canaris
patent: 5600260 (1997-02-01), LaMacchia et al.

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