Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2007-02-20
2007-02-20
Tung, Kee M. (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S532000, C345S536000, C345S537000, C345S538000
Reexamination Certificate
active
10931376
ABSTRACT:
A distributed memory controller memory system for a graphics processing system having addressable memory areas each coupled to a respective memory controller. The memory controllers are further coupled to each other through a memory controller bus upon which a memory access request and data may be passed from one memory controller to other memory controller. A memory access request to a memory location in one addressable memory area, but received by a memory controller coupled to another addressable memory area, is passed through the memory controller bus from the receiving memory controller to the memory controller coupled to the addressable memory area in which the requested location is located in order to service the memory access request. Additional memory controllers coupled to a respective addressable memory area may be included in the memory system. The memory controllers are coupled to the memory controller bus in order to receive and pass memory access requests from the other memory controllers.
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Peterson James R.
Radke William
Dorsey & Whitney LLP
Micro)n Technology, Inc.
Nguyen Hau
Tung Kee M.
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