Television – Basic receiver with additional function – Multimode
Reexamination Certificate
2000-03-27
2003-06-10
Hsia, Sherrie (Department: 2614)
Television
Basic receiver with additional function
Multimode
C348S557000, C348S441000
Reexamination Certificate
active
06577348
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital TV, and more particularly, to a video processing apparatus for displaying input signals of an analog type in a digital TV.
2. Discussion of Related Art
A National Television Standards Committee (NTSC) system has been used as the television (TV) transmission system for the past decades. However, with the development of a digital TV, the NTSC system and the digital TV must coexist in the future years.
Particularly, the digital TV processes and displays digital stream data based on an Advanced Television Systems Committee (ATSC) system. The digital TV is capable of simultaneously receiving data of the existing analog TV through a different channel and also supplying the PC display formats such as a Video Graphics Array (VGA).
Particularly, if the digital TV receives a NTSC signal, a synchronization signal is detected from a composite video signal demodulated through a tuner. Thereafter, a luminance element and a color signal are separated from the demodulated video signal and are digitally sampled through an analog/digital converter (ADC). The VGA is output generally in a format of RGB, and an analog RGB is digitalized through the ADC in order for a digital process.
Thus, an input signal of an ATSC or NTSC or a VGA may be displayed on digital TV screen. The NTSC and VGA are analog video signals having different resolution, namely in horizonal frequency and number of samples per scanning line. Also, unlike the VGA signal based on an RGB color space, the NTSC is constructed with a luminance signal Y and a color signal U, V, requiring a specific ADC having a clamp characteristic. Moreover, the NTSC and VGA requires a different clock as sampling frequency varies according to mutually different resolution and scanning system.
Accordingly, to process a TV video signal, the Y signal and the U, V signal must be separately clamped to different DC level, while all three RGB channels of the VGA must be clamped to a same level. That is, the method of constructing the ADC varies depending upon a signalling characteristic.
The NTSC video signal is based on an interlaced scanning system and has a horizontal frequency of 15.7 KHz which corresponds to a half of a VGA 640×480 mode of similar space resolution. The VGA signal has horizontal frequency of approximately 31.5 KHz. Thus, different sampling clocks which are proportionate to the horizontal frequency should be provided to perform a sampling resulting in information of similar horizontal resolution.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to solve at least the problems and disadvantages of the related art.
An object of the present invention is to provide an efficient video processing method and apparatus of a digital TV. Particularly, an object of the present invention is to decrease signal paths of video signals based on different formats and required devices.
Another object of the present invention is to provide a video processing method and apparatus of a digital TV capable of reducing a crosstalk by unifying different sampling blocks.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve the objects and in accordance with the purposes of the invention, as embodied and broadly described herein, the video processing apparatus of a digital TV comprises a selector for receiving at least one analog video signal, said selector selecting and outputting one of the analog video signals; a clock generator for generating a single clock locked with the analog video signal selected through the selector; an ADC for digitalizing the analog video signal output from a switch synchronously to the clock; a display format converter for converting the digitalized video signal to match to a display format; and a controller for controlling the input video selection and clock generation.
In accordance with the present invention, the selector converts an RGB type signal into a Y,Cb,Cr type signal and outputs the converted signal, in case the input analog video signal is a VGA. Also, the controller reads a register value corresponding to a signal source in a predetermined table according to signal source selection information to set the clock generator, and the clock generator decides generation frequency according to the register value.
The present invention may further include a clamp pulse generator for receiving a horizontal synchronization signal through the selector, generating clamp pulse in a section between the horizontal synchronization signal and active data, and outputting the generated clamp pulse to the ADC. Moreover, the present invention may further include a field detector which detects field information in case the input analog video signal is an NTSC, and outputs it to the display format converter.
In accordance with the present invention, the video processing apparatus may further comprise a multiplexer for multiplexing a digitalized Cb,Cr color signal in response to a selection signal; a selection signal generator for generating the selection signal from a clock generated in the clock generator and a reconstructed horizontal synchronization, and providing it to the multiplexer; and a horizontal synchronization regenerator for generating pulse on the basis of a clock of the clock generator at a time point of a leading edge immediate after a horizontal synchronization output through the selector, logically combining this generated pulse with its n-clock delayed pulse, and reconstructing a horizontal synchronization.
Also, a method of processing video comprises unifying a flow of analog video signals by converting received analog video signals into a predetermined format; and utilizing one clock to process said analog signal of the predetermined format by generating said clock to correspond to said analog signal of the predetermined format.
Furthermore, in another embodiment, a method of processing video in a digital TV comprises receiving at least one analog video signal, synchronizing the received analog video signals into a predetermined format, selecting and outputting an analog video signal of said predetermined format; generating a clock locked with the analog video signal of said predetermined format; digitalizing the analog video signal of said predetermined format, in synchronization to the clock, and outputting a digitalized video signal; converting the digitalized video signal to match a display format; and controlling the selection of an analog video signal and controlling the clock generation.
REFERENCES:
patent: 5784113 (1998-07-01), Rhodes
patent: 6211918 (2001-04-01), Uwabata et al.
Hsia Sherrie
LG Electronics Inc.
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