Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Patent
1996-09-04
1998-04-14
Dutton, Brian
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
324548, 324754, 324765, H01L 2166, G01R 3102, G01R 3126, G01R 3112
Patent
active
057390525
ABSTRACT:
A technique for quantifying the effect of plasma etching during the formation of MOS transistors avoids the problems of prior techniques. A modified MOS capacitor 40 comprising a dielectric 12 separating a conductive plate 18 having a conductive sidewall 24 from a conductive substrate 10 is formed using the same or similar steps as a MOS transistor. Dielectric layer 12, such as oxide, is formed over a portion of conductive substrate 10. Conductive capacitor plate 18 is formed over a portion of the dielectric layer 12 using a plasma etch to remove unwanted material. After forming capacitor plate 18, the area of capacitor plate 18 is modified to encompass a peripheral oxide region 20. The modification consists of placing a conductive sidewall 24 of the same material as capacitor plate 18 or of other conductive materials around the periphery of capacitor plate 18. Electrical characterization is performed on modified MOS capacitor 40 yielding information about damage to the oxide in peripheral region 24 caused by the plasma etch. Modified MOS capacitor 40 can be used to compare plasma chemistries, detect oxide trenching, detect etchant loading and determine the effect of process hardware changes, for example. It can especially account for oxide loss in tight geometry features and in regimes where optical measurement techniques are unreliable.
REFERENCES:
patent: 4760032 (1988-07-01), Turner
patent: 4812885 (1989-03-01), Riesmenschneider
patent: 5420513 (1995-05-01), Kimura
patent: 5598102 (1997-01-01), Smayling et al.
Krishnan Srikanth
McKee Jeffrey A.
Donaldson Richard L.
Dutton Brian
Laws Gerald E.
McClure C. Alan
Texas Instruments Incorporated
LandOfFree
Apparatus and method for detecting defects in insulative layers does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for detecting defects in insulative layers , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for detecting defects in insulative layers will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-634189