Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-01-26
2003-04-01
Fahmy, Wael (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S629000, C438S653000, C438S656000
Reexamination Certificate
active
06541371
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and method for depositing tantalum (Ta) and tantalum nitride (TaN) barrier films, and copper (copper) thin films for applications in semiconductor processing. The preferred embodiment of this invention is related to U.S. Pat. No. 5,482,611 entitled “Physical Vapor Deposition Employing Ion Extraction From a Plasma” issued on Jan. 9, 1996 to Helmer et al., and assigned to the same assignee, Novellus Systems, Inc., and incorporated herein by reference in its entirety.
2. Description of Related Art
Tantalum and/or tantalum nitride for barrier liners and copper seed layers are being considered by all major manufacturers as the primary interconnect metals for applications in semiconductor processing in the next generation of integrated circuits (ICs). This is primarily due to lower manufacturing costs and increased performance of the ICs when copper is used as the primary interconnect metal as opposed to aluminum.
In a typical application, a dielectric is deposited, e.g., using plasma enhanced chemical vapor deposition (PECVD), and then patterned, e.g., by plasma etching, to open contacts to either a previous layer or making contact to the semiconductor device. A thin layer of tantalum and/or tantalum nitride is deposited using a physical vapor deposition (PVD) technique as a barrier to the copper interconnect. This barrier layer prevents diffusion of copper into the semiconductor devices as copper diffusion is detrimental to the performance of the devices resulting in shorts. Thereafter, a thin layer of copper is deposited as the seed layer for subsequent electroplating or CVD fill of the structure, again using a PVD technique. The copper seed layer, as apparent from its name, provides a favorable thin film upon which nucleation and growth of copper, as the fill material, may be promoted.
It is important for the tantalum/tantalum nitride barrier layer to be continuous providing a “no hole” blanket inside the patterned feature such that copper does not diffuse past the barrier into the electronic devices. It is equally important for the copper seed layer to be continuous to provide a “no hole” film for nucleation and growth of subsequent copper fill on all surfaces of the feature to be filled with copper. For electroplating fill applications, the copper seed layer continuity is even more significant because the necessary electroplating current needs to flow throughout the thin copper seed layer. In addition, due to the presence of acidic species in the electroplating bath, a non-continuous or too thin copper film may be dissolved by the bath before any nucleation and growth of the electroplating film may occur.
Other important properties of the barrier and seed layers that need to be controlled are surface smoothness and grain size. For the case of tantalum/tantalum nitride, it is important that the films be amorphous and/or nanocrystalline such that grain boundary diffusion is reduced for reduced diffusion paths of copper through the tantalum/tantalum nitride barrier layers and into the devices. Thus, it would be desirable to develop a method of depositing a smooth and/or nano-crystalline tantalum/tantalum nitride having reduced grain boundary diffusion.
As the critical dimension of semiconductor devices gets smaller, the patterned contact or via holes get narrower and deeper, i.e. the aspect ratio of the contacts or vias increase. Standard PVD techniques are proven to be inadequate for depositing films in narrow, high aspect ratio structures with necessary and sufficient step coverage. A technique that improves directionality of the depositing species and therefore improves the step coverage is ionized PVD (IPVD). Several techniques have been employed to achieve IPVD such as Radio Frequency biased IPVD (RFIPVD), Ion Metal Plasma (IMP), and Hollow Cathode Magnetron (HCM) can be named. However, many of the IPVD sources suffer from the fact that they cannot produce a sufficiently high density plasma that can adequately ionize the depositing metal species. The RFIPVD and IMP IPVD sources produce medium plasma densities in the order 1-5×10
11
particles/cm
3
. This requires the use of RF bias on the wafer pedestal in order to accelerate the ions in the plasma sheath near the wafer to obtain better step coverage. However, the use of RF bias on the wafer causes an increase in the wafer temperature. An increase in temperature would degrade the quality of films such as tantalum/tantalum nitride and copper resulting in decreased barrier performance and unsatisfactory copper fill as mentioned above. This tends to limit the application of medium density plasma IPVD sources (RFIPVD and IMP) for certain applications including that of tantalum/tantalum nitride barrier and copper seed layers in semiconductor processing. Thus, it would be desirable to find a method of depositing tantalum/tantalum nitride barrier and copper seed layers at low temperatures such that barrier performance and satisfactory copper fill are not compromised.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method of depositing tantalum/tantalum nitride barrier layers at sufficiently low temperatures having reduced grain boundaries so that barrier liner performance is not compromised.
It is another object of the present invention to provide a method of depositing a “no hole” blanket tantalum/tantalum nitride barrier layer within a high aspect ratio opening on a semiconductor wafer such that copper does not diffuse past the barrier layer.
A further object of the invention is to provide a method of depositing a superior copper seed layer at sufficiently low temperatures so that the copper seed layer is uniform and continuous so that the necessary electroplating current may flow throughout the seed layer during electroplating.
It is yet another object of the present invention to provide a method of depositing a “no hole” copper seed layer within a high aspect ratio opening on a semiconductor wafer such that subsequent copper deposition is enhanced.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The present invention is directed to, in a first aspect, a method of forming a barrier film in semiconductor processing in a reaction chamber, the method comprising the steps of: (a) providing a semiconductor wafer having at least one opening formed thereon, the semiconductor wafer placed into the reaction chamber; (b) providing a sputter source selected from the group consisting of tantalum and tantalum nitride having a wafer stage temperature of less than about 0° C.; (c) cooling the semiconductor wafer to a temperature of about 20° C. to about −10° C.; and (d) sputter depositing a layer of material selected from the group consisting of tantalum, tantalum nitride and combinations thereof.
Preferably, step (a) comprises providing a semiconductor wafer having at least one via or trench formed thereon as interconnects, the semiconductor wafer placed into the reaction chamber. Preferably, step (b) comprises providing a sputter source having a wafer stage temperature of about −70° C. to about 0° C.
Preferably, step (c) comprises cooling the semiconductor wafer using a backside gas at a pressure of about 2 Torr to about 10 Torr inside the reaction chamber.
Step (d) may comprise sputter depositing a layer of tantalum followed by sputter depositing a layer of tantalum nitride thereover; or sputter depositing a layer of tantalum nitride followed by sputter depositing a layer of tantalum thereover. Preferably, step (d) comprises sputter depositing a layer of material selected from the group consisting of tantalum and tantalum nitride having a minimum thickness of about 40 Å to about 60 Å within the at least one opening. Most preferably, step (d) comprises sputter depositing a layer of material selected from the group consisting of ta
Ashtiani Kaihan A.
Biberger Maximilian A.
Fai Lai Kwok
Klawuhn Erich R.
Levy Karl B.
DeLio & Peterson LLC
Estrada Michelle
Fahmy Wael
Novellus Systems Inc.
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